If you want to know what analog/mixed-signal designers need, ask Arvin Shahani, a member of the technical staff at Fairchild Semiconductor. Shahani's entire presentation at ICCAD last week was devoted to the tools needed for mixed-signal ICs.

First requirement: CAD tools that allow a sharing of schematic and layout files. "Other designers need to see my schematic if they're simulating my blocks, and the layout guy needs to see my schematic to make sure everything is working together," said Shahani. What's needed, he said, is an integrated development environment that can back-annotate parasitics on schematics.

Besides schematic, simulation and layout tools, Shahani said, Fair- child uses field solvers to analyze structures such as inductors and transformers, and mathematical software packages to complement simulation tools. Also, analog behavior models are essential for system-level exploration and verification. "I still do simulations that last multiple days to weeks, and I hate it," Shahani said. "Anything that speeds up simulation is a must-have."

Shahani uses periodic steady-state and harmonic-balance simulations where possible because they run much faster than transient simulations. He wants a capability to swap out blocks that don't need to be simulated.

Analog tools for any given process node stabilize about a year later than digital tools, said Marwan Hassoun, senior vice president of engineering at Keyeye Communications Inc. While digital tools provide an automated flow, analog tools are still manual, with yield margins added by the designer, he said--one reason that analog yields are traditionally lower than digital.

EDA vendors have recently introduced tools that can help with analog yields, but these must be backed with marketing and education, Hassoun said. Spice simulation, he said, should add performance margins and account for yield. It all adds up to a "huge EDA opportunity" at 65 nanometers and below, Hassoun said.

-- Richard Goering