NICE, France — Click on the headlines below to read the full stories.

Panel explores automotive electronics' new frontier At the DATE conference a panel of executives from across the automotive electronics design and supply chains discussed critical system design challenges facing automotive electronics.

German EDA firm aims simulation tool at wireless designs A small design automation company based in Darmstadt, Germany, is positioning its microwave/RF 3D simulation tools to become part of the design flow for wireless ICs.

French microelectronics research platform selects CoFluent French electronic system level company CoFluent Design announced at the DATE conference, that its ESL modelling and simulation environment has been selected for use by the PACA (Provence-Alpes-Côte d’Azur) Integrated Microelectronics Center, known as CIM PACA.

Panel discusses 65-nm mixed-signal design At a panel discussion at the DATE conference this week in Nice, France, speakers called for the emergence of a breed of analog designers who would be able to face the increased constraints and challenges of designing at 65-nm and below.

ECSM models add signal integrity A new release of the Effective Current Source Modeling (ECSM) specification from the Silicon Integration Initiative (Si2) includes extensions for modeling signal integrity. Combined with earlier timing and power extensions, the new features claim to provide a complete modeling solution for IC signoff analysis.

Tanner adds 3D parasitic extraction to L-Edit Tanner EDA has added hierarchical 3D resistance and capacitance (RC) extraction capabilities to its L-Edit chip layout tool for analogue and mixed-signal design.

IP-XACT-based IDE provides complete environment - Magillem 4.0 is the latest version of a integrated design environment based on the IP-XACT standards by the SPIRIT Consortium.

Handshake extends clockless regime to AHB bus - Handshake Solutions (Eindhoven, The Netherlands), a wholly-owned subsidiary of Koninklijke Philips NV, has announced the release of a clockless version of a multilayer AMBA Advanced High-performance Bus (AHB).

EDA startup boosts design-for-reuse - Committed to intellectual property (IP) reusability, French EDA startup Satin IP Technologies has introduced at the DATE conference this week in Nice, France, a design-for-reuse software cockpit.

Infiniscale claims DFY prediction to analog, mixed-signal chips - French EDA startup Infiniscale SA, provider of modeling, model-based synthesis and parametric yield solutions, has introduced new releases of its analog systems modelling, synthesis and design-for-manufacturing (DFM), design-for-yield (DFY) product suite.

Synplicity fields ASIC DSP synthesis - Synplicity rolled out its Synplify DSP ASIC Edition software at DATE. Synplify DSP is an ESL synthesis tool that has until now been aimed at FPGA designs.

Panel wrestles with field programmable, SOC dilemma - A panel of experts, moderated by EDA analyst Gary Smith, tried to wrestle with the task of "bridging the FPSoC divide" on the first day of the DATE exhibition and conference.

E2v chooses Cortus APS3 Core from CAST - E2v's Grenoble design center is to use the CAST, Inc. APS3 IP core as its embedded processing core for upcoming mixed-signal sensor and imaging system products.

Multi-volt design specialist expands European channel - ArchPro Design Automation has expanded its European distribution network with the addition of FirstEDA Ltd. in the U.K., AmbLot in France, and Germany’s eVision Systems.

Dolphin - Lynguent team for AMS modellingLynguent Inc. and Dolphin Integration SA are to integrate their modeling and simulation solutions and provide them to designers of analog/mixed-signal (AMS) integrated circuits (ICs).

Mentor unveils Broadcom's latest emulator Mentor Graphics Corp. (Wilsonville, Oregon) is unveiling its latest hardware emulator family on the show floor at the DATE exhibition in Nice, France on Tuesday (April 17).

Camposano appointed CEO at simulation startup Dr Raul Camposano, formerly senior vice president and general manager of the silicon engineering group at Synopsys Inc. (San Jose, Calif.) has moved to become chief executive officer at Xoomsys Inc. (Cupertino, Calif.). Read Richard Goering's take on the news here

A new 'DATE' for hardware-assisted verification Hardware-assisted verification will sprint in new directions at the DATE Conference in Nice, France, this week, where Mentor Graphics Corp. will unveil an "emulation on a chip" architecture for its new Veloce accelerators and emulators, and EVE SA will turn out ZeBu-AX, its next-generation hardware accelerator. Both announcements help move hardware-assisted verification to higher levels of abstraction.

Real Intent formally verifies clock crossings Claiming to verify both the structures and protocols for a clock domain crossing (CDC) "safe" design, formal verification provider Real Intent introduced its Meridian product at the Design Automation and Test Europe (DATE) conference in Nice, France Monday (April 16). It will replace the company's current Clock Intent Verification (CIV) product